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GS9068 SD SDI Cable Driver
DATA SHEET KEY FEATURES * SMPTE 259M and SMPTE 344M compliant * dual coaxial cable driving outputs * 50 differential PECL input * single 3.3V power supply operation * space-saving 8-lead SOIC * operating temperature range: 0C to 70C * pin compatible with GS1528 HD-LINXTM II multirate SDI dual slew-rate cable driver * Pb-free and Green APPLICATIONS * SMPTE 259M Coaxial Cable Serial Digital Interfaces DESCRIPTION The GS9068 is a second generation high-speed bipolar integrated circuit designed to drive one or two 75 co-axial cables at data rates up to 540Mb/s. The GS9068 accepts a LVPECL level differential input, which may be AC coupled. External biasing resistors at the inputs are not required. Power consumption is typically 160mW using a +3.3V DC power supply.
GS9068
BANDGAP REFERENCE AND BIASING CIRCUIT
RSET
SDI SDI
INPUT DIFFERENTIAL PAIR
SDO OUTPUT STAGE & CONTROL SDO
GS9068 FUNCTIONAL BLOCK DIAGRAM
Revision Date: June 2004 GENNUM CORPORATION P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3 Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946 E-mail: info@gennum.com www.gennum.com
Document No. 22213 - 2
TABLE OF CONTENTS
1. PIN OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1 PIN ASSIGNMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 PIN DESCRIPTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2. ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 ABSOLUTE MAXIMUM RATINGS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.2 DC ELECTRICAL CHARACTERISTICS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.3 AC ELECTRICAL CHARACTERISTICS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
GS9068
3. DETAILED DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-6
3.1 SERIAL DIGITAL INPUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.2 SERIAL DIGITAL OUTPUT. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.3 OUTPUT RETURN LOSS MEASUREMENT. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.4 OUTPUT AMPLITUDED ADJUSTMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4. APPLICATION REFERENCE DESIGN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.1 PCB LAYOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4.2 TYPICAL APPLICATION CIRCUIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
5. REFERENCES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 6. PACKAGE & ORDERING INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
6.1 PACKAGE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 6.2 ORDERING INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
7. REVISION HISTORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
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1. PIN OUT
1.1 PIN ASSIGNMENT
GS9068
SDI SDI VEE RSET
1 2 3 4
8 7 6 5
SDO SDO NC VCC
GS9068 8 PIN SOIC
TOP VIEW
1.2 PIN DESCRIPTIONS PIN NUMBER 1,2 3 NAME SDI, SDI VEE RSET VCC NC SDO, SDO TYPE Input Input Power Input Input Power Output Serial digital differential input. Most negative power supply connection - connect to GND. DESCRIPTION
4 5
External output amplitude control resistor. Most positive power supply connection - connect to +3.3V.
6 7,8
No Connect. Serial digital differential output.
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2. ELECTRICAL CHARACTERISTICS
2.1 ABSOLUTE MAXIMUM RATINGS
TA = 25C unless otherwise indicated
PARAMETER Supply Voltage Input ESD Voltage Storage Temperature Range Input Voltage Range (any input) Operating Temperature Range Power Dissipation Lead Temperature (soldering, 10 sec)
VALUE -0.5V to 3.6 VDC 500V -50C < Ts < 125C -0.3 to (VCC +0.3)V 0C to 70C 300mW 260C
CAUTION The GS9068 is sensitive to electrostatic discharge. Use extreme caution, observing all ESD-prevention practices, during handling and assembly. The SDI inputs of the GS9068 must be protected from electrostatic discharge and electrical overstress during the handling and operation of circuit assemblies containing the device.
GS9068
2.2 DC ELECTRICAL CHARACTERISTICS
VCC = 3.3V, VEE =0V, TA = 0C to 70C, 270Mb/s unless otherwise shown
PARAMETER Supply Voltage Power Consumption Supply Current Output Voltage Input Voltage
SYMBOL VCC PD s VOC VIC
CONDITIONS
MIN 3.1 -
TYPICAL 3.3 160 48 VCC - VSDO(SE) -
MAX 3.5 VCC - VSDI(DIFF)/2
UNITS V mW mA mV mV
TEST LEVEL 3 5 1 6 1
Common mode Common mode
1.6 + VSDI(DIFF)/2
2.3 AC ELECTRICAL CHARACTERISTICS
VCC = 3.3V, VEE =0V, TA = 0C to 70C, 270Mb/s unless otherwise shown
PARAMETER Serial input data rate Input Voltage Swing Output Voltage Swing
SYMBOL DRSDI VSDI(DIFF) VSDO(SE)
CONDITIONS
MIN -
TYPCAL 800
MAX 540 2000 850
UNITS Mb/s mVp-p mVp-p
TEST LEVEL 1 1 1
Differential Single Ended into 75 external load RSET = 750
300 750
Additive jitter Rise/Fall time Mismatch in rise/fall time Duty cycle distortion Overshoot Output Return Loss TEST LEVELS 1. Production test at room temperature and nominal supply voltage with guardbands for supply and temperature ranges. 2. Production test at room temperature and nominal supply voltage with guardbands for supply and temperature ranges using correlated test. 3. Production test at room temperature and nominal supply voltage. 4. QA sample test. 5. Calculated result based on Level 1, 2, or 3. 6. Not tested. Guaranteed by design simulations. 7. Not tested. Based on characterization of nominal parts. 8. Not tested. Based on existing design/characterization data of similar product. 9. Indirect test. 10. Wafer Probe ORL tr, tf tr, tf 20% - 80%
400 15
-
30 800 30 100 8 -
ps ps ps ps % dB
1 1 1 1 1 7
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3. DETAILED DESCRIPTION
3.1 SERIAL DIGITAL INPUT
SDI/SDI are high impedance differential inputs. Several conditions must be observed when interfacing to these inputs: 1. The differential input signal amplitude must be between 300 and 2000mVpp. 2. For DC coupling to the device, the common mode voltage must be between 1.6+VSDI(DIFF) and VCCVSDI(DIFF). 3. For input trace lengths longer than approximately 1cm, the inputs should be terminated as shown in the Typical Application Circuit.
Fig. 1 Static Protection Diodes
SDO
GS9068
SDO
The GS9068 inputs are self-biased, allowing for simple AC coupling to the device. For serial digital video, a minimum capacitor value of 4.7F should be used to allow coupling of pathological test signals. A tantalum capacitor is recommended.
3.2 SERIAL DIGITAL OUTPUT
3.3 OUTPUT RETURN LOSS MEASUREMENT
The GS9068 outputs are current mode and will drive 800mV into a 75 load. These outputs are protected from accidental static damage with internal static protection diodes. The SMPTE 259M standard requires that the output of a cable driver have a source impedance of 75 and a return loss of at least 15dB between 5MHz and 540MHz. In order for an SDI output circuit using the GS9068 to meet this specification, the output circuit shown in the Typical Application Circuit is recommended. The value of LCOMP will vary depending on the PCB layout, with a typical value of 5.6nH. A 4.7F capacitor is used for AC coupling the output of the GS9068. This value is chosen to ensure that pathological signals can be coupled without a significant DC component occurring. See Section 4, Application Reference Design, for more details. When measuring return loss at the GS9068 output, it is necessary to take the measurement for both a logic high and a logic low output condition. This is because the output protection diodes act as a varactor (voltage controlled capacitor) as shown in Figure 1. Consequently, the output capacitance of the GS9068 is dependent on the logic state of the output.
To perform a practical return loss measurement, it is necessary to force the GS9068 output to a DC high or low condition. The actual return loss will be based on the outputs being static at VCC or VCC-1.6V. Under normal operating conditions the outputs of the GS9068 swing between VCC-0.4V and VCC-1.2V, so the measured value of return loss will not represent the actual operating return loss. A simple method of calculating the values of actual operating return loss is to interpolate the two return loss measurements. In this way, the values of return loss are estimated at VCC-0.4V and VCC-1.2V based on the measurements at VCC and VCC-1.6V. The two values of return loss (high and low) will typically differ by several decibels. If the measured return loss is RH for logic high and RL for logic low, then the two values can be interpolated as follows: RIH = RH- (RH-RL)/4, and RIL = RL+(RH-RL)/4, where RIH is the interpolated logic high value and RIL is the interpolated logic low value. For example, if RH = -18dB and RL = -14dB, then the interpolated values are RIH = -17dB and RIL = -15dB.
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3.4 OUTPUT AMPLITUDE ADJUSTMENT
The output amplitude of the GS9068 can be adjusted by changing the value of the RSET resistor as shown in Figure 2 and Table 1 below. For an 800mVp-p output with a nominal 7% tolerance, a value of 750 is required. A 1% SMT resistor should be used.
The RSET resistor is part of the high speed output circuit of the GS9068. The resistor should be placed as close as possible to the RSET pin. In addition, the PCB capacitance should be minimized at this node by removing the PCB groundplane beneath the RSET resistor and the RSET pin.
Table 1: RSET vs VOD RSET () OUTPUT SWING 608mV 734mV 800mV 884mV 1040mV
GS9068
1100
OUTPUT SWING (mV)
1000
995 824 750
900
800
600
700
573
600 500
600
700
800
900
1000
RSET ()
NOTE: For reliable operation of the GS9068 over the full temperature range, do not use an RSET value below 573.
Fig. 2 Output Amplitude Adjustment
4. APPLICATION REFERENCE DESIGN
4.1 PCB LAYOUT
An FR-4 dielectric can be used, however, controlled impedance transmission lines are required for PCB traces longer than approximately 1cm. Note the following PCB artwork features used to optimize performance: * The PCB groundplane is removed under the GS9068 output components to minimize parasitic capacitance.
*
The PCB ground plane is removed under the GS9068 RSET pin and resistor to minimize parasitic capacitance. Input and output BNC connectors are surface mounted in-line to eliminate a transmission line stub caused by a BNC mounting via high speed traces which are curved to minimize impedance variations due to change of PCB trace width.
*
4.2 TYPICAL APPLICATION CIRCUIT
5.6n 75 4u7 GS9068 49.9 10n DIFFERENTIAL DATA INPUT 49.9 1 2 3 4 SDI SDI VEE RSET SDO SDO NC VCC 8 7 6 5 75
*
BNC 4u7 VCC 10n
75 75 5.6n * 4u7 VCC 10n
BNC
4u7 VCC
750
* TYPICAL VALUE VARIES WITH LAYOUT
NOTE: All resistors in Ohms, capacitors in Farads, and inductors in Henrys, unless otherwise noted.
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5. REFERENCES Compliant with SMPTE 259M and SMPTE 344M. 6. PACKAGE & ORDERING INFORMATION
6.1 PACKAGE DIMENSIONS
1.91 MAX 0.49 MAX 1.27 MAX
GS9068
5.00 MAX.
8
5 0.25 4.0 MAX 6.20 MAX MAX
1
4 0.25 MAX = = =
0.60 MAX
3.81 0.05 3 spaces @ 1.27 0.05 8-pin SOIC All dimensions are in millimetres
6.2 ORDERING INFORMATION PART NUMBER GS9068-CKA GS9068-CTA GS9068-CKAE3 GS9068-CTAE3 PACKAGE 8 pin SOIC 8 pin SOIC Tape 8 pin SOIC 8 pin SOIC Tape TEMPERATURE RANGE 0C to 70C 0C to 70C 0C to 70C 0C to 70C Pb-FREE AND GREEN No No Yes Yes
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7. REVISION HISTORY
VERSION A B 0 ECR 120608 125775 127024 DATE July 2002 July 2002 December 2002 New Document Added detailed block descriptions and initial applications information. Document upgraded to Preliminary Data Sheet and AC/DC Characteristics edited to match current design specification limits. Document upgraded to Data Sheet. Added lead-free and green information. CHANGES AND/OR MODIFICATIONS
GS9068
1 2
128544 133977
March 2003 June 2004
DOCUMENT IDENTIFICATION
DATA SHEET The product is in production. Gennum reserves the right to make changes at any time to improve reliability, function or design, in order to provide the best product possible.
CAUTION
ELECTROSTATIC SENSITIVE DEVICES
DO NOT OPEN PACKAGES OR HANDLE EXCEPT AT A STATIC-FREE WORKSTATION
GENNUM CORPORATION
MAILING ADDRESS: P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3 Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946 SHIPPING ADDRESS: 970 Fraser Drive, Burlington, Ontario, Canada L7L 5P5
GENNUM JAPAN CORPORATION Shinjuku Green Tower Building 27F, 6-14-1, Nishi Shinjuku, Shinjuku-ku, Tokyo, 160-0023 Japan Tel. +81 (03) 3349-5501, Fax. +81 (03) 3349-5505 GENNUM UK LIMITED 25 Long Garden Walk, Farnham, Surrey, England GU9 7HX Tel. +44 (0)1252 747 000 Fax +44 (0)1252 726 523
Gennum Corporation assumes no responsibility for the use of any circuits described herein and makes no representations that they are free from patent infringement. (c) Copyright July 2002 Gennum Corporation. All rights reserved. Printed in Canada.
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